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VEIGLO through continuous R&D and innovation accumulation of solid-state storage technologies, has formed core technologies such as system-in package(SIP) development

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Via the system-in-package(SiP) method, a variety of functional chips/bare die are packaged side-by-side or superimposed, and functional chips such as processors and NAND Flash are integrated into one package to a complete memory that can be replaced traditional solid-state storage products have the characteristics of small size, large capacity and high performance. VEIGLO has mastered the core SiP packaging technology and possesses professional capabilities such as system design, substrate design and simulation, system-level signal integrity analysis, power integrity and thermal power analysis.

  • ◎ Multi-chip package substrate layout design
  • ◎ Chip special packaging design
  • ◎ High-speed signal simulation of chip packaging
  • ◎ Chip mechanics simulation
  • ◎ Chip thermal simulation
  • ◎ Package soldering simulation
  • ◎ Packaging and testing technology
  • ◎ Chip application solutions





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